Qzero with SRAM extension reaching 40 MHz 68040

[Peter]

Hi all,

I just played with a little new project, a fast RAM extension for the Qzero:

It plugs onto the Qzero's 40-pin GPIO header and 4 pins of the video header.
There are certainly better ways to attach RAM to an FPGA, but I had no time for a Qzero redesign.

I know it is pretty pointless to optimize QL hardware for speed, as it will never reach the emulators. But my fun goal was to reach one of my classic designs, the Q40 running at 40 MHz with my FPGA implementation. Unlike the QXL, the Q40 was a high-end 68040 machine at its time, e.g. beating the NeXT Station Turbo, Amiga 1200 with accelerator board, etc.

Some years ago, Francois Lanciault found that a Q68 running from internal RAM was surprisingly fast http://theqlforum.com/viewtopic.php?t=2637 and Nasta draw some very interesting conclusions http://theqlforum.com/viewtopic.php?p=25593#p25593. So I thought it would be cool to try SRAM as main memory, not just a small chunk for specific accellerations. At least for QL-typical plain 68000 code, there was hope to reach the 68040. Here is what I could achieve, still with lowest speed grade FPGA:

• TEST909 Speed Test (Rolf Ritter): 66.03 - 3% faster than Q40
• Prime numbers benchmark (Francois Lanciault): 47s @ 2 million runs - 13% faster than Q40
  viewtopic.php?p=25604#p25604
• QSBB Basic Benchmark (Al Feng): 46160/102300/226820 - 6.6% slower than Q40

So indeed, with fast RAM and a little tweaking, the Qzero roughly reaches the Q40 in QL specific benchmarks.
In the not 68K or QL specific Dhrystone benchmark, the 40 MHz 68040 is still 28% faster.

I don't have a Q40 ready to run Q-Top Index, but since it was frequently referenced in this forum, here is the Qzero+SRAM result:

If someone has a Q40 at hand, please try and post the result. I attach a QLWA container for convenience. LRESPR thorst_bin before executing the benchmark. And don't forgat to activate copyback cache.

[Derek_Stewart]

Hi Peter,

I have a Q40 board, but the CPU is faulty, it locks up after 10 minutes.

I will see if I can get a 68040 CPU to get the Q40 running.

The SRAM extension looks great, would a good addition to my Qzero.

[Peter]

I have a Q40 board, but the CPU is faulty, it locks up after 10 minutes.

Hi Derek, the Q-Top benchmark does not take 10 minutes. I'd be curious.

[Maskenlos]

Hi Peter,

great achievement. Can't await to unpack mine tomorrow. Thanks for the x-mas gift!

Stephan

[Tinyfpga]

I have some questions on the SRAM extension and ESP5 speed grades:-
Is the SRAM large enough to hold all of the SMSQE code as supplied with various installations?
Currently that size seems to be about 330 Kbytes.
Once loaded into SRAM does it stay there?
Is code that is LRESPRed, loaded into the SRAM?
How much faster would a Qzero be with the fastest grade of ESP5?

[Peter]

How much faster would a Qzero be with the fastest grade of ESP5?

You probably mean ECP5. "How much" compared to what exactly and by which measure?
Speed does not only depend on the FPGA, but also on RAM access time and how much work I invest in optimization.

[Tinyfpga]

Peter wrote:- You probably mean ECP5. "How much" compared to what exactly and by which measure?
Speed does not only depend on the FPGA, but also on RAM access time and how much work I invest in optimization.

As you say, I did mean ECP5. I assume this is the FPGA series that you use in your Qzero.

My question was; given identical RAM access times and identical optimization, how much faster would the highest grade ECP5 be than your Qzero design? In other words how much difference does a faster ECP5 make?

I assume Static RAM access times are much lower than DRAM. I was keen to know how your SRAM extension is used in an SMSQE installation.
ie. Is......etc as in my previous post.

If SMSQE is stored in SRAM and it stays there then won't access to the system via SMS be to SRAM with its much shorter access times.

If the SRAM was battery backed might it not be possible to have very fast startup times after switch off.

[Peter]

My question was; given identical RAM access times and identical optimization, how much faster would the highest grade ECP5 be than your Qzero design?

Maybe 10 to 20% in terms of clock speed, compared to the SRAM based system above.
Which does not translate 1:1 to specific benchmarks or use cases.

I assume Static RAM access times are much lower than DRAM.

Not in general. Only for random access, and only fastest speeed grade. In burst mode, SDRAMs are much faster than external asynchronous SRAM like the one I used here. For that reason, video memory had to remain SDRAM.

I was keen to know how your SRAM extension is used in an SMSQE installation.

No idea what you mean. SMSQ/E works as usual, just much faster than a regular Qzero.

[Tinyfpga]

No idea what you mean. SMSQ/E works as usual, just faster.

I'm not sure what I mean either. So may I phrase my questions as follows:-
How or why does SMSQ/E work faster with your SRAM extension?

[Peter]

How or why does SMSQ/E work faster with your SRAM extension?

Because random memory access has become much faster.
Typical speed gain in benchmarks is more than factor 3 over a regular Qzero.