The Sinclair QL Forum

It is 18x18, 223 pins, of which 17 are unused in general, further 29 are unused in my design. The PCB has holes for all 223.
It would be cool to have a one-piece socket. How do you press the pins into the nylon carcase? Manually?


On smaller single pieces, yes. If I get an order for a quantity I ...

The original machine is purely made from throughhole type components. It will still be possible to have them machine soldered, but that has become very expensive. Various components are obsolete, but available. The CPU socket is not available, and needs to be "tinkered" - or the CPU soldered ...

Does anyone know why the Tetroid clone SGC skips the parallel printer port? On my machine, the printer port code is still in the ROM image and a program trying to uses it causes the computer to hang, which is quite reasonable behavior I think.

Is the printer port supported in his INGOT version ...

Extending on this idea, bringing out a separate write protect switch out to the front so there were 4 dip switches, you could have a ROM image in one slot and RAM accessible in the other 3 slots, giving you a nice 48K spot to stick data or an executable or whatever. A ROM slot like on the back of ...

The easiest way to accomplish this is with a 128Kx8 SRAM and a CR2032 as backup power. The battery would hold the contents in SRAM for around two years of standby time. A jumper could enable or disable the write lines to protect the ROM images.

One refinement would be to have TWO CR2032s so they ...

Thank you. This answered my question precisely and exquisitely.

I had in mind the possibility of moving the QIMSI Gold to the expansion bay and a different logical slot but this is irrelevant as you demonstrate. I was looking at the options to add hardware support for other Gold Card functions like ...

Is the QIMSI fully relocatable?

Can it be plugged into any logical ROM slot?

Will it recognize other inserted ROMs in other slots?

I have an expansion card that has four ROM slots on it, mapped to three expansion slots and the original back slot location.

The RP2350 can pump out 2400Mbits/s+ using PIO to the HSTX interface with 0% CPU involvement or utilization. The B revision has more than enough GPIO with 48 available and three PIO engines that can access any/all of those pins in parallel and can do DMA accesses without CPU involvement. It has an ...

Glad you’re all sorted.

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