The Sinclair QL Forum

@Martyn - Ah, so your saying the QL doesn't use the M6800 Peripheral Interface for register but uses VPA and generates VMA for Interrupt cycles. I will have to check this is not confusing my state machine logic...

Cheers

Will

The plot thickens, I see that that IC24 IPC sends it interrupt to IC38 HAL16L8 mystery chip... which is also connected to !VPA so it could be using the 68000 slow peripheral timing for IO registers. I hadn't considered this 'till just now... with all my ROM and RAM tests I never witnessed !VPA in ...

Hi XorA

I'm doing this as the first line in my m68k_write_memory_8() and m68k_read_memory_8()

address = address & 0x03FFFF;

Do you think that would cause the problem?

Tried 0x0FFFFF instead but it still crashes...

Well Interrupts are now working how I expected.

IntsWorking.png

Which means reading and writing to the Interrupt register
is definitely working. The problem was just my lack of understanding of QL and Musashi interrupt handling worked.
I also worked out what all the black space is in the TXN ...

Peter, some good points there, I have heard people mentioning on here that modern fast logic chips can cause problems with timing etc.
with the QL. I've had a few ideas about what's going on with the interrupts which I'm going to implement now that I understand how the
interrupt register works using ...

Ha! That'll be why they keep a copy in the system variables for setting and clearing the register
in the JS ROM.
It all makes sense now.

L2B88 move.b sv_pcint(a6),d7 ;interrupt register setting
ori.b #pc.intrg,d7 ;clear gap interrupt
andi.b #$DF,d7 ;disable gap interrupts
move.b d7,pc_intr-pc ...

Well that hasn't had the effect I was hoping for, it hasn't sorted it but at least I know I am turning the interrupts off
correctly now and I can rule that out.

Strangely, when I read and print the contents of the interrupt register directly after setting it to 0x1F
and before the emulator begins ...

Thank you, I try it right away.

like this...

ps_write_8(0x18021, 0xFF); // Mask off all interrupt sources
ps_read_8(0x18021); // clear any pending interrupts by reading interrupt register?

I'm pretty sure it isn't right.

I very definitely have a problem with interrupts. For some reason !IPL1 is constantly low, even before I run the emulator.


QLPiStormInterruptProblem.png
The logic analyser is showing IPL0/2 always high, which is correct, but IPL1 is constantly low.
IPL_ZERO should be high most of the time ...