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CST Thor RAM test
Posted: Fri May 23, 2025 2:56 pm
by Witchy
Hi folks,
I sent a message to the old forum a couple of weeks ago and it disappeared. Chatting to Simon Goodwin recently and he told me about this new location which explains why my message vanished.
I've been setting my Thor 8 up for showing off at RetroFest at the end of the month (31/05-01/06 at STEAM in Swindon) and since its last powerup in 2018 its gained a habit of locking up or just acting weird. I suspected power so made a power harness to replace the little Astec with a Mean Well RQ60B, problems persisted. I've tested the QL separately with my ICE cart and that works fine, so my question is are there any RAM tests in SuperBASIC that can test the Thor board's RAM space? I've done a lot of searching and all I've found is a program called RAMT_BAS on Dilwyn's site, but I don't know how to drive it.
If I boot the ICE floppy my screen background doesn't go green. It remains as the SuperBASIC red/white but has the icons laid over the top with no menus. It looks very odd
I was sent a copy of Spellbound (hi Jeffrey if you're here) and that gives an 'Out of Memory' error. I've scoped the buffers and RAM chips on the board and the signals LOOK ok.
Any help appreciated as always, and maybe see some of you in Swindon?
Cheers
Re: CST Thor RAM test
Posted: Sat May 24, 2025 7:11 am
by Derek_Stewart
Hi
The Thor 8 is basically a standard QL board with expansion boards on the ROM port and Main expansion bus.
SO I would say that any QL ram test programme will perform a test of the 128K of QL board ram.
The obvious ram testing software would be Minerva, but I seem to remember that Minerva, had problems with the Thor hardware, or maybe the Minerva ROM would only see the 128K of ram on the QL board.
Re: CST Thor RAM test
Posted: Sat May 24, 2025 9:11 pm
by Witchy
Hi Derek,
I've read about the Minerva RAM test but not to the degree of it having an issue with the Thor board. However, with the QL board extracted and powered with 5V from the edge connector it seems fine. Last night with the machine fully assembled I was trying to copy things into RAM1_ which the Thor additions provide and it couldn't copy the Thor Xchange binary without running out of memory. I then spent a good couple of hours looking for a routine that would examine the directories of FLP1_ and RAM*_ to give me available bytes in the same way the CP/M STAT command does, but couldn't see anything. FORMAT RAM1_ finishes immediately.
Surely there's a command I'm missing to do that?
Tomorrow I'll attempt removing each 4164 RAM chip on the Thor board so I can test it out of circuit.
Cheers
Re: CST Thor RAM test
Posted: Sat May 24, 2025 9:20 pm
by Derek_Stewart
Hi,
If you can load Toolkit 2, there is the STAT command to give file info or WSTAT to give information of files on the disk.
Re: CST Thor RAM test
Posted: Mon May 26, 2025 2:59 pm
by Witchy
Ah I didn't know that. Sure I read the docs for TKII but obviously didn't. I'll have a look, cheers!
Having got into the machine I can see that the chips are D41257C 256x1 which makes sense given that there's 512k on the board. I don't have a tester or even spares for those; my Retro Chip Tester pro parts won't arrive until wed/thu so the Thor will remain a working-ish but not running Quill exhibit at RetroFest next at the weekend in Swindon. I've pulled and tested all the decoders and selectors for RAM but everything looks ok.
Cheers,
Re: CST Thor RAM test
Posted: Mon May 26, 2025 4:18 pm
by Witchy
Interlogic INTROM1 FTW. I'd forgotten I had that. WSTAT is so close to what I need, unless it's telling me that there's 0 bytes free in RAM1_ because it can't access it which is entirely possible. Anything that involves RAM over 128K seems to have an issue.
I have another QL kicking around. The Thor tech manual doesn't state that there are any specific hardware mods to the QL board itself, can I just swap it out?
Cheers,
Re: CST Thor RAM test
Posted: Mon May 26, 2025 5:42 pm
by aalea
I want to remember that I have the schematic and PCB of the Thor here:
https://github.com/alvaroalea/QL_Thor20 ... _expansion
The memory expansion are basically 2 multiplexer, 2 chained buffer, a GAL and de 16 RAM chips, but other logic are also involved.
Unfortunately, I do not have detail of the gal, that generate the signals for the cas/ras.
Re: CST Thor RAM test
Posted: Tue May 27, 2025 4:46 pm
by Witchy
Oh wow, I was going to do exactly that! I didn't think that anyone else might've done it already so didn't ask. A mate is going to send me one of his spare boards to scan and feed into KiCAD's new trace copying feature. This was before I realised that the tech manual already has the trace layout in it
I've already pulled and tested the multiplexers, buffers and the low numbered ICs on the left side of the board - the higher ones are related to the SCSI and Floppy interfaces.
One thing I've not done is tried replacing the QL board because there's some voltage changes that need to be done.
Cheers
Re: CST Thor RAM test
Posted: Wed May 28, 2025 10:53 am
by stephen_usher
Well, if you have Toolkit II you should be able to do a res_128 to go into 128K memory mode and then either write a SuperBASIC or assembler memory tester for the upper RAM which merely "POKE"s and "PEEK"s data into the addresses above the 128K boundary, as that will not be being used by the system and hence should be safe.
Here's a march test routine for you...
Code: Select all
lea ramstart,a1 ; Load the base of RAM into a1
marchtestp1:
move.b #$FF,(a1)+ ; Write a byte of 1s to RAM.
dbf d0,marchtestp1 ; Go around until all RAM has been filled.
dbf d1,marchtestp1 ; Go around until all RAM has been filled.
move.l #2,d2 ; Memory test 2
move.l #memtstsizel,d0 ; Set up the RAM test loop counters
move.l #memtstsizeh,d1
lea ramstart,a1 ; Load the base of RAM into a1
move.l #$000000FF,d3
marchtestp2:
cmpi.b #$FF,(a1) ; Test if what we read is what we wrote.
bne memerror ; If it's not error and halt.
eori.b #-1,(a1)+ ; XOR the memory value with all ones.
dbf d0,marchtestp2 ; Go around again until all memory has been done.
dbf d1,marchtestp2 ; Go around again until all memory has been done.
move.l #3,d2 ; Memory test 3
move.l #memtstsizel,d0 ; Set up the RAM test loop counters
move.l #memtstsizeh,d1
lea ramstart,a1 ; Load the base of RAM into a1
move.l #$00000000,d3
marchtestp3:
cmpi.b #$00,(a1) ; Test if what we read is the opposite of what we wrote.
bne memerror ; If it's not error and halt.
eori.b #-1,(a1)+ ; XOR the memory value with all ones.
dbf d0,marchtestp3 ; Go around again until all memory has been done.
dbf d1,marchtestp3 ; Go around again until all memory has been done.
move.l #4,d2 ; Memory test 4
move.l #memtstsizel,d0 ; Set up the RAM test loop counters
move.l #memtstsizeh,d1
lea ramstart,a1 ; Load the base of RAM into a1
move.l #$000000FF,d3
marchtestp4:
cmpi.b #$FF,(a1) ; Test if what we read is what we wrote originally.
bne memerror ; If it's not error and halt.
eori.b #-1,(a1)+ ; XOR the memory value with all ones.
dbra d0,marchtestp4 ; Go around again until all memory has been done.
dbra d1,marchtestp4 ; Go around again until all memory has been done.
memtstend:
bra endmemtst ; The memory test has completed successfully.
Re: CST Thor RAM test
Posted: Thu May 29, 2025 8:53 am
by Witchy
Interesting, I didn't know about res_128. I wonder if this will allow ICE to work since I know it works on the bare QL board. Thanks to my illness I've not been able to do half the things I wanted to this week so I'll see if I can try that today.
See you on Saturday