Re: Q68 netwrok port hardware
Posted: Wed May 20, 2020 3:31 pm
There is.Derek_Stewart wrote:Hi,
There needs to be a switch on the connector
RIP Sir Clive Sinclair 1940 - 2021
https://theqlforum.com/
There is.Derek_Stewart wrote:Hi,
There needs to be a switch on the connector
It does. When I apply 3.3V to the QLnet pin, the value becomes 57.Peter wrote: That's correct in inactive state (Bit 0 = 0). When you pull the line high, it should change.
SInce your test proved that your Q68 FPGA has not been damaged, I would not expect much from replacing the diodes. Did you check their polarity, by the way?FrancoisLanciault wrote:It does. When I apply 3.3V to the QLnet pin, the value becomes 57.Peter wrote: That's correct in inactive state (Bit 0 = 0). When you pull the line high, it should change.
Let's wait for the BAT43.
Peter, I used Dave's schematic as found here https://www.theqlforum.com/viewtopic.php ... =20#p28425Peter wrote:SInce your test proved that your Q68 FPGA has not been damaged, I would not expect much from replacing the diodes. Did you check their polarity, by the way?FrancoisLanciault wrote: It does. When I apply 3.3V to the QLnet pin, the value becomes 57.
Let's wait for the BAT43.
Never seen updated Gerber files or solution.Dave wrote:I will be uploading a slightly modified board later.
It fixes a bug where the termination resistors are wired incorrectly (the signal is wired to ground not the tip, and the termination resistor to the tip, not ground side of the switch. I discovered the switched 3.5mm jacks I bought have a different connector order to the unswitched ones.
It also adds .4mm extra clearance from the supercap, which is used for battery back-up. While contact doesn't present an electrical problem, the cap is quite exposed and I have to allow for the unlikely event one wasn't mounted perfectly straight.
In the mean time, please do not use the above gerbers.
I was interested, but was waiting on your corrections.Dave wrote:Sorry about that. Nobody seemed interested so I dropped the project.
My understanding was that the error was in the Gerber file, not in the schematics. I used Dave’s schematic, not the Gerber.Derek_Stewart wrote:Hi Francois,
Did you take the message by Dave into account with a bug in the circuit diagram you
...
You should check your circuit with the file supplied by Peter, supplied here for reference.
qlnet.pdf
The schematics from Dave are fine.FrancoisLanciault wrote:My understanding was that the error was in the Gerber file, not in the schematics. I used Dave’s schematic, not the Gerber.