The Sinclair QL Forum

You could make use of a DS1210 chip to gate control of your /CE based on power supply readiness - this would protect the chip from write corruption when you switch off the main power.

https://datasheets.maximintegrated.com/en/ds/DS1210.pdf

Dave wrote:You could have a physical witch to connect /WR. If you tie it to 5V it can’t be written. A mechanical pull-up.

I would prefer a wizard, they tend to be more reliable and trustworthy

Mark

Hi,

All the SRAM backed protection, makes me thinking about mechanical bank switching on 512K eeprom, as I can address only 256K upper or lower halves. Here I rely that a reverse leakage is big enough to pull address line high, and not that big to be pulled low with a switch. I know resistors could be used instead, but I am interested in a use of a suitable diode? Could this work on power on as well as runtime?
Tomas

I strongly recommend you do use a resistor to pull up undriven address line inputs. For CMOS chips, a value of between 4.7kΩ and 10kΩ is suitable.

If an address line for a CMOS SRAM is allowed to float, it will pick up interface and static charge from other conductors or conductive bodies/objects. And it could then ‘see’ a logic low or a logic high or keep flipping between high and low. Then the CPU may well access the wrong memory location(s)...

The reverse leakage current of a silicon diode reverse biased at 5V is tiny and may not be enough to be reliable. And in fact, I see no need for a diode as shown on your schematic. Put a resistor in place of the diode

Mark

+1 on that - diodes are not good as pull ups !