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Re: Bare Metal Diagnostic ROM: Now good enough to use.

Posted: Sun Jul 06, 2025 7:49 pm
by stephen_usher
Chr$ wrote: Sun Jul 06, 2025 5:52 pm Another little update:

I removed the soldered IC3 and replaced it with a socket. The chip tests as OK in my Retro chiptester pro! But it clearly isn't, or it's at least marginal in some respect.

With IC3 completely missing I get just this screen using the diagrom:
20250706_182900(1).jpg
Sorry it's not in colour!

And with a known working 4164 in the IC3 socket everything is fine.
What you're seeing on the screen are the initial RAM test failure screen:

The top black stripe means it's the lower 64K bank.
You then have five green bars, showing good bits.
Then one red bar, showing a bad bit.
Then two green bars.

If you had a serial port connected you would have been given the faulting address and a map of which bits were good/bad.

Re: Bare Metal Diagnostic ROM: Now good enough to use.

Posted: Sun Jul 06, 2025 7:54 pm
by stephen_usher
Popopo wrote: Sun Jul 06, 2025 11:43 am A full memory test requires to:
1. Detect shorts
2. Fill the whole memory with at least 4 different basic patterns and read them are the same after it. "00", "11", "01", "10" and random. What takes some time.
3. In case of DRAM ICs, also check after a while the data remains (refresh).
4. If there are Logic ICs (multiplexers mainly) involved in RAM structure, also check those "somehow".
Testing the random and multiple bits is only really useful for chips which are no one bit wide.

I chose a March test followed by an "own address" test because it should pick up stuck bits (March), addressing errors (March) and shorted data lines (own address).

March tests only work properly if done on whole RAM chips as you can't guarantee to catch all replicated data otherwise.

Re: Bare Metal Diagnostic ROM: Now good enough to use.

Posted: Sun Jul 06, 2025 8:30 pm
by Popopo
stephen_usher wrote: Sun Jul 06, 2025 7:54 pm
Popopo wrote: Sun Jul 06, 2025 11:43 am A full memory test requires to:
1. Detect shorts
2. Fill the whole memory with at least 4 different basic patterns and read them are the same after it. "00", "11", "01", "10" and random. What takes some time.
3. In case of DRAM ICs, also check after a while the data remains (refresh).
4. If there are Logic ICs (multiplexers mainly) involved in RAM structure, also check those "somehow".
Testing the random and multiple bits is only really useful for chips which are no one bit wide.

I chose a March test followed by an "own address" test because it should pick up stuck bits (March), addressing errors (March) and shorted data lines (own address).

March tests only work properly if done on whole RAM chips as you can't guarantee to catch all replicated data otherwise.
You are right.
Those patterns 00 and so on, repeat themselves till compleate the whole wide data bus. 00000000, 11111111, 10101010, 01010101...
Filling the whole amount of memory