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Re: Problem booting Super Gold Card

Posted: Fri Oct 15, 2021 12:09 pm
by Silvester
Pr0f wrote:
Silvester wrote:I don't understand how VSYNCH (20mS) connected only to FLP chip has anything to do with memory refresh? (YMMV)
Is it connected to the FLP chip? That seems odd if it is.
Yes, I have checked both Nasta's and Tetroid's schematics of Gold Card. (Something to do with locking data separator to crystal, or as an indicator of drive door open, according to datasheet, perhaps just used as way of reading QL tick)

Re: Problem booting Super Gold Card

Posted: Fri Oct 15, 2021 12:29 pm
by Pr0f
I never noticed that before!

I know the Gold card doesn't use CSYNC signal - but I believe the SGC does - for refresh clock for DRAMS - so might be worth checking that signal is not mis-wired somewhere in the cable for the monitor...

Re: Problem booting Super Gold Card

Posted: Fri Oct 15, 2021 12:43 pm
by Pr0f
I wonder if the use of vsync signal to the FDC is just a cheeky way of knowing the state of that signal, so you know when you are in vertical flyback?

Re: Problem booting Super Gold Card

Posted: Fri Oct 15, 2021 1:14 pm
by Silvester
The signal is on D7 so a quick way to check timing out of an operation within device driver code (rather than reading ZX8302).

I have no schematic of SGC, I tried looking closely at pictures of Tetroid's PCB's but can't see if B13 (CSYNCL) is used. Puzzled why SGC would use CSYNCL for DRAM refresh when GC EPLD chip deals with it.

My SGC is buried in a PC case setup so I can't check that easily. Though isn't it a multlayer board?

Re: Problem booting Super Gold Card

Posted: Fri Oct 15, 2021 2:31 pm
by Pr0f
It was a note on the aurora manuals - which is why that signal was still provided on the bus

Re: Problem booting Super Gold Card

Posted: Sat Oct 16, 2021 8:53 am
by Derek_Stewart
Silvester wrote:Yes, I have checked both Nasta's and Tetroid's schematics of Gold Card. (Something to do with locking data separator to crystal, or as an indicator of drive door open, according to datasheet, perhaps just used as way of reading QL tick)
Can you tell me where I can get the Gold Card schematics?

Re: Problem booting Super Gold Card

Posted: Sat Oct 16, 2021 12:40 pm
by Silvester
Derek_Stewart wrote:
Silvester wrote:Yes, I have checked both Nasta's and Tetroid's schematics of Gold Card. (Something to do with locking data separator to crystal, or as an indicator of drive door open, according to datasheet, perhaps just used as way of reading QL tick)
Can you tell me where I can get the Gold Card schematics?
I can't recall where I got it from but it was made available publicly.

Re: Problem booting Super Gold Card

Posted: Sat Oct 16, 2021 12:50 pm
by Silvester
Which reminds me I used to have a schematic of SuperHermes, though now I can't find in my files :(

Re: Problem booting Super Gold Card

Posted: Sat Oct 16, 2021 3:56 pm
by Derek_Stewart
Hi,

The Superhermes schematic was included in the Superhermes manual.

Re: Problem booting Super Gold Card

Posted: Sat Oct 16, 2021 5:00 pm
by Silvester
Derek_Stewart wrote:Hi,

The Superhermes schematic was included in the Superhermes manual.
I don't have a SuperHermes (*), so I don't know whether the paper manual had full schematic, the PDF on Dilwyn's site only shows PCB layout. IIRC I had a PDF of the full schematic.

(* I did preorder a SuperHermes way back in the day when support was asked for project - but after waiting months and then hearing they were being sold across the counter at latest QUANTA show I cancelled. I had the same thing happen with my Q40, and whole lot worse - but that's another story best not vented here :evil: :evil: :evil: )

PS (Oh, and despite that I gave it a good review in QUANTA when I was associate editor - albeit through gritted teeth. Peter had been helpful and it was his project so I didn't want to slate it)